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Embedded Software Design

Robust, reliable embedded software engineered to align with industry standards such as ISO 26262 and DO-178C — with real-time operating systems, deterministic execution and fault-tolerant architectures built in from the start.

Real-time OSDeterministic executionFault-tolerant architectureCertification support
01 / MATLAB & Simulink

Control software and scripting

System behaviour is modelled before a single line of production code is written, so control logic is verified against the plant model rather than debugged in the field.

  • System modeling & simulation
  • Automatic code generation
  • Model verification
  • Control algorithm development
STATEFLOW · SUPERVISORY LOGIC Initentry: bist() Standbyentry: hold() Activedu: ctrl_step() Faultentry: safe() [bist_ok] [enable] [!enable] [fault] [reset] Stateflow supervisory chart
/* 1 kHz servo control task, fixed period */
#define CTRL_PERIOD_MS 1U

static void ctrl_task(void *arg)
{
    TickType_t next = xTaskGetTickCount();

    for (;;) {
        adc_read(&in);
        ctrl_step(&in, &out);   /* model code */
        dac_write_ma(out.i_cmd);

        vTaskDelayUntil(&next,
            pdMS_TO_TICKS(CTRL_PERIOD_MS));
    }
}
Periodic control task in C
FPGA logic architecture drawingFPGA logic
01 / 03